The next generation Celeron was the 'Coppermine-128' (sometimes known as the Celeron II). These were a derivative of Intel's Coppermine Pentium III and were released on 29 March 2000. Like the Mendocino, the Celeron-128 used 128 KB of on-chip L2 cache and was (initially) restricted to a 66 MHz Front Side Bus Speed, But the big news was the addition of SSE instructions, due to the new Coppermine core. Besides only having half the L2 cache (128 KB instead of 256 KB) and the lower FSB (66-100 MHz instead of 100-133 MHz), the Coppermine Celeron was identical to the Coppermine Pentium III.